CGTS_CU5_SP0_CTRL_REG__SP00_MASK 24423 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK                                                                      0x0000007FL
CGTS_CU5_SP0_CTRL_REG__SP00_MASK 25736 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK                                                                      0x0000007FL
CGTS_CU5_SP0_CTRL_REG__SP00_MASK 25867 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK                                                                      0x0000007FL
CGTS_CU5_SP0_CTRL_REG__SP00_MASK 9811 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK 0x7f
CGTS_CU5_SP0_CTRL_REG__SP00_MASK 11535 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK 0x7f
CGTS_CU5_SP0_CTRL_REG__SP00_MASK 11933 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CGTS_CU5_SP0_CTRL_REG__SP00_MASK 0x7f