CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  590 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1
CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  754 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1
CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  754 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1
CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  806 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1
CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  810 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1
CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT  838 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__RF_RM_6_2__SHIFT 0x1