CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  614 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  778 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  778 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  830 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  834 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT  862 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE3__SHIFT 0x18