CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  612 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  776 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  776 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  828 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  832 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT  860 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE2__SHIFT 0x17