CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  610 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  774 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  774 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  826 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  830 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16
CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT  858 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CC_SMU_TST_EFUSE1_MISC__DFT_SPARE1__SHIFT 0x16