CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  516 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5
CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  682 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5
CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  682 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5
CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  732 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5
CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  736 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5
CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT  764 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define CC_RCU_FUSES__CG_RST_GLB_REQ_DIS__SHIFT 0x5