CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 10417 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK                                                               0x0001F800L
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 5936 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK                                                               0x0001F800L
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 5410 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK                                                               0x0001F800L
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 5243 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK                                                               0x0001F800L
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK  824 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 0x0001f800L
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK  785 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 0x1f800
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK  999 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 0x1f800
CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 1001 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define CB_HW_CONTROL_1__CC_CACHE_NUM_TAGS_MASK 0x1f800