CACHE_DLIMIT       36 arch/arm/mm/cache-fa.S #define CACHE_DLIMIT	(CACHE_DSIZE * 2)
CACHE_DLIMIT       44 arch/arm/mm/cache-v4wb.S #define CACHE_DLIMIT	(CACHE_DSIZE * 4)
CACHE_DLIMIT       39 arch/arm/mm/cache-v4wt.S #define CACHE_DLIMIT	16384
CACHE_DLIMIT       53 arch/arm/mm/proc-arm1020.S #define CACHE_DLIMIT	32768
CACHE_DLIMIT       53 arch/arm/mm/proc-arm1020e.S #define CACHE_DLIMIT	32768
CACHE_DLIMIT       53 arch/arm/mm/proc-arm1022.S #define CACHE_DLIMIT	32768
CACHE_DLIMIT       53 arch/arm/mm/proc-arm1026.S #define CACHE_DLIMIT	32768
CACHE_DLIMIT       44 arch/arm/mm/proc-arm920.S #define CACHE_DLIMIT	65536
CACHE_DLIMIT       46 arch/arm/mm/proc-arm922.S #define CACHE_DLIMIT	8192
CACHE_DLIMIT       68 arch/arm/mm/proc-arm925.S #define CACHE_DLIMIT	8192
CACHE_DLIMIT       32 arch/arm/mm/proc-arm926.S #define CACHE_DLIMIT	16384
CACHE_DLIMIT       26 arch/arm/mm/proc-arm946.S #define CACHE_DLIMIT	(CACHE_DSIZE * 4)	/* benchmark needed */
CACHE_DLIMIT       27 arch/arm/mm/proc-feroceon.S #define CACHE_DLIMIT	16384
CACHE_DLIMIT       24 arch/arm/mm/proc-mohawk.S #define CACHE_DLIMIT	32768