BL_PWM_CNTL__BL_PWM_EN__SHIFT 3160 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 3230 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 3478 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 9308 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT                                                                         0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 1740 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x0000001f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 3238 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT 0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 40057 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT                                                                         0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 48793 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT                                                                         0x1f
BL_PWM_CNTL__BL_PWM_EN__SHIFT 43291 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define BL_PWM_CNTL__BL_PWM_EN__SHIFT                                                                         0x1f