BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT  134 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT  202 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT  242 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 5166 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT                                                         0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 1728 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 0x00000000
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT  134 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 28411 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT                                                         0x0
BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT 25069 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define BL1_PWM_USER_LEVEL__BL1_PWM_USER_LEVEL__SHIFT                                                         0x0