BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK  647 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK 0x3fffc
BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK  617 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK 0x3fffc
BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK 17688 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK                                                     0x0003FFFCL
BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK 117964 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_VDDGFX_GFX5_UPPER__VDDGFX_GFX5_REG_UPPER_MASK                                                     0x0003FFFCL