BIF_SSA_PWR_STATUS__SSA_MC_PWR_STATUS_MASK  282 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define BIF_SSA_PWR_STATUS__SSA_MC_PWR_STATUS_MASK 0x00000004L
BIF_SSA_PWR_STATUS__SSA_MC_PWR_STATUS_MASK  573 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define BIF_SSA_PWR_STATUS__SSA_MC_PWR_STATUS_MASK 0x4