BIF_SSA_MC_LOWER__SSA_MC_REG_CMP_EN_MASK  272 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define BIF_SSA_MC_LOWER__SSA_MC_REG_CMP_EN_MASK 0x40000000L
BIF_SSA_MC_LOWER__SSA_MC_REG_CMP_EN_MASK  619 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define BIF_SSA_MC_LOWER__SSA_MC_REG_CMP_EN_MASK 0x40000000