BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT  934 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT  938 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 2483 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                      0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 1816 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                      0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 17792 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                      0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 118068 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                      0x2
BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT 20574 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                      0x2