BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT  932 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT  936 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 2481 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT                                                                      0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 1813 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT                                                                      0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 17789 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT                                                                      0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 118065 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT                                                                      0x0
BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT 20571 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_RB_WPTR_ADDR_HI__ADDR__SHIFT                                                                      0x0