BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT  117 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT 0x00000000
BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT  216 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT 0x0
BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT  254 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT 0x0
BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT  220 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define BIF_DEBUG_MUX__DEBUG_MUX_BLK1__SHIFT 0x0