BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT 56289 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT                                                            0x8
BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT 5113 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT                                                            0x8
BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT 7020 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT                                                            0x8
BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT 22130 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_SWDS0_COMMAND__SERR_EN__SHIFT                                                            0x8