BIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA__PM_SUB_STATE__SHIFT 10429 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA__PM_SUB_STATE__SHIFT                                         0xa
BIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA__PM_SUB_STATE__SHIFT 7297 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_CFG_DEV0_EPF2_0_PCIE_PWR_BUDGET_DATA__PM_SUB_STATE__SHIFT                                         0xa