rFPGA0_TxGainStage   21 drivers/staging/rtl8188eu/include/hal8188e_phy_reg.h #define	rFPGA0_TxGainStage	0x80c	/*  Set TX PWR init gain? */
rFPGA0_TxGainStage   50 drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h #define rFPGA0_TxGainStage		0x80c
rFPGA0_TxGainStage   10 drivers/staging/rtl8192u/r819xU_phyreg.h #define rFPGA0_TxGainStage			0x80c
rFPGA0_TxGainStage   90 drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h #define	rFPGA0_TxGainStage		0x80c	/* Set TX PWR init gain? */
rFPGA0_TxGainStage   97 drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h #define		rFPGA0_TxGainStage			0x80c	/*  Set TX PWR init gain? */