BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT 7162 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT                                                           0x4
BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT 3389 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT                                                           0x4
BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT 4801 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT                                                           0x4
BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT 4576 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT                                                           0x4
BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT 28816 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define BIF_CFG_DEV0_EPF1_0_STATUS__CAP_LIST__SHIFT                                                           0x4