BIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT 104600 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT                                  0x16
BIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT 32209 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF8_1_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT                                  0x16