mmWD_UTCL1_STATUS 2308 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmWD_UTCL1_STATUS                                                                              0x0fe4
mmWD_UTCL1_STATUS  300 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmWD_UTCL1_STATUS                                                                              0x0244
mmWD_UTCL1_STATUS  296 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmWD_UTCL1_STATUS                                                                              0x0244
mmWD_UTCL1_STATUS  290 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmWD_UTCL1_STATUS                                                                              0x0244