mmWD_CNTL_STATUS_BASE_IDX 2299 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmWD_CNTL_STATUS_BASE_IDX                                                                      0
mmWD_CNTL_STATUS_BASE_IDX  291 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmWD_CNTL_STATUS_BASE_IDX                                                                      0
mmWD_CNTL_STATUS_BASE_IDX  287 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmWD_CNTL_STATUS_BASE_IDX                                                                      0
mmWD_CNTL_STATUS_BASE_IDX  281 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmWD_CNTL_STATUS_BASE_IDX                                                                      0