mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX 1183 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX                                                             2
mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX  913 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX                                                             2
mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX  875 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmWBSCL_COEF_RAM_TAP_DATA_BASE_IDX                                                             2