mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1168 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0
mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0
mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1139 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0
mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1279 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0
mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1311 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0
mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 1295 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX                                                         0