mmVM_L2_CNTL_BASE_IDX 1154 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0
mmVM_L2_CNTL_BASE_IDX 1187 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0
mmVM_L2_CNTL_BASE_IDX 1125 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0
mmVM_L2_CNTL_BASE_IDX 1265 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0
mmVM_L2_CNTL_BASE_IDX 1297 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0
mmVM_L2_CNTL_BASE_IDX 1281 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmVM_L2_CNTL_BASE_IDX                                                                          0