mmVM_IOMMU_CONTROL_REGISTER 6644 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x5aa9
mmVM_IOMMU_CONTROL_REGISTER 6890 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x5aa9
mmVM_IOMMU_CONTROL_REGISTER 6914 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x5aa9
mmVM_IOMMU_CONTROL_REGISTER 1846 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x07f5
mmVM_IOMMU_CONTROL_REGISTER 1878 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x07f5
mmVM_IOMMU_CONTROL_REGISTER 1862 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmVM_IOMMU_CONTROL_REGISTER                                                                    0x07f5