mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX 5615 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX                                                           1
mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX 5867 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX                                                           1
mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX 5827 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX                                                           1