mmVGT_MC_LAT_CNTL 2292 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmVGT_MC_LAT_CNTL                                                                              0x0fd6
mmVGT_MC_LAT_CNTL  284 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVGT_MC_LAT_CNTL                                                                              0x0236
mmVGT_MC_LAT_CNTL  280 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVGT_MC_LAT_CNTL                                                                              0x0236
mmVGT_MC_LAT_CNTL  274 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVGT_MC_LAT_CNTL                                                                              0x0236
mmVGT_MC_LAT_CNTL 1705 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmVGT_MC_LAT_CNTL 0x2236
mmVGT_MC_LAT_CNTL 2350 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmVGT_MC_LAT_CNTL                                                       0x2236
mmVGT_MC_LAT_CNTL 2374 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmVGT_MC_LAT_CNTL                                                       0x2236
mmVGT_MC_LAT_CNTL 2614 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmVGT_MC_LAT_CNTL                                                       0x2236
mmVGT_MC_LAT_CNTL 2593 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmVGT_MC_LAT_CNTL                                                       0x2236