mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX 6437 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX                                                              1
mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX 4039 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX                                                              1
mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX 4291 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX                                                              1
mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX 4245 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX                                                              1