mmVGA_TEST_CONTROL 6039 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmVGA_TEST_CONTROL                                                      0xd5
mmVGA_TEST_CONTROL 6116 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmVGA_TEST_CONTROL                                                      0xd5
mmVGA_TEST_CONTROL 7790 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmVGA_TEST_CONTROL                                                      0xd5
mmVGA_TEST_CONTROL  588 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmVGA_TEST_CONTROL                                                                             0x0015
mmVGA_TEST_CONTROL 4399 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmVGA_TEST_CONTROL 0x00D5
mmVGA_TEST_CONTROL 5156 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmVGA_TEST_CONTROL                                                      0xd5
mmVGA_TEST_CONTROL  422 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_TEST_CONTROL                                                                             0x0015
mmVGA_TEST_CONTROL   66 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_TEST_CONTROL                                                                             0x0015
mmVGA_TEST_CONTROL  130 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_TEST_CONTROL                                                                             0x0015