mmVGA_STATUS_CLEAR_BASE_IDX  583 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmVGA_STATUS_CLEAR_BASE_IDX                                                                    1
mmVGA_STATUS_CLEAR_BASE_IDX  417 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_STATUS_CLEAR_BASE_IDX                                                                    1
mmVGA_STATUS_CLEAR_BASE_IDX   61 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_STATUS_CLEAR_BASE_IDX                                                                    1
mmVGA_STATUS_CLEAR_BASE_IDX  125 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_STATUS_CLEAR_BASE_IDX                                                                    1