mmVGA_STATUS_BASE_IDX  579 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmVGA_STATUS_BASE_IDX                                                                          1
mmVGA_STATUS_BASE_IDX  413 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_STATUS_BASE_IDX                                                                          1
mmVGA_STATUS_BASE_IDX   57 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_STATUS_BASE_IDX                                                                          1
mmVGA_STATUS_BASE_IDX  121 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_STATUS_BASE_IDX                                                                          1