mmVGA_SRC_SPLIT_CNTL_BASE_IDX 1585 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_SRC_SPLIT_CNTL_BASE_IDX                                                                  2
mmVGA_SRC_SPLIT_CNTL_BASE_IDX 1225 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_SRC_SPLIT_CNTL_BASE_IDX                                                                  2
mmVGA_SRC_SPLIT_CNTL_BASE_IDX 1187 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_SRC_SPLIT_CNTL_BASE_IDX                                                                  2