mmVGA_RENDER_CONTROL_BASE_IDX  555 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmVGA_RENDER_CONTROL_BASE_IDX                                                                  1
mmVGA_RENDER_CONTROL_BASE_IDX  389 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_RENDER_CONTROL_BASE_IDX                                                                  1
mmVGA_RENDER_CONTROL_BASE_IDX   33 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_RENDER_CONTROL_BASE_IDX                                                                  1
mmVGA_RENDER_CONTROL_BASE_IDX   89 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_RENDER_CONTROL_BASE_IDX                                                                  1