mmVGA_INTERRUPT_STATUS_BASE_IDX  585 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmVGA_INTERRUPT_STATUS_BASE_IDX                                                                1
mmVGA_INTERRUPT_STATUS_BASE_IDX  419 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmVGA_INTERRUPT_STATUS_BASE_IDX                                                                1
mmVGA_INTERRUPT_STATUS_BASE_IDX   63 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmVGA_INTERRUPT_STATUS_BASE_IDX                                                                1
mmVGA_INTERRUPT_STATUS_BASE_IDX  127 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmVGA_INTERRUPT_STATUS_BASE_IDX                                                                1