mmUVD_VCPU_CACHE_SIZE6_BASE_IDX  641 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_VCPU_CACHE_SIZE6_BASE_IDX                                                                1
mmUVD_VCPU_CACHE_SIZE6_BASE_IDX  700 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_VCPU_CACHE_SIZE6_BASE_IDX                                                                1