mmUVD_VCPU_CACHE_OFFSET1   89 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_VCPU_CACHE_OFFSET1 0x3D38
mmUVD_VCPU_CACHE_OFFSET1   62 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_VCPU_CACHE_OFFSET1                                                0x3d84
mmUVD_VCPU_CACHE_OFFSET1   68 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_VCPU_CACHE_OFFSET1                                                0x3d84
mmUVD_VCPU_CACHE_OFFSET1   84 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_VCPU_CACHE_OFFSET1                                                0x3d84
mmUVD_VCPU_CACHE_OFFSET1  180 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET1                                                                       0x0584
mmUVD_VCPU_CACHE_OFFSET1  368 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET1                                                                       0x0584
mmUVD_VCPU_CACHE_OFFSET1  618 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET1                                                                       0x0244
mmUVD_VCPU_CACHE_OFFSET1  677 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_VCPU_CACHE_OFFSET1                                                                       0x0142