mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX  177 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX                                                              1
mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX  365 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX                                                              1
mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX  615 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX                                                              1
mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX  674 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX                                                              1