mmUVD_UDEC_DBW_ADDR_CONFIG 87 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x3BD5 mmUVD_UDEC_DBW_ADDR_CONFIG 36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x3bd5 mmUVD_UDEC_DBW_ADDR_CONFIG 36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x3bd5 mmUVD_UDEC_DBW_ADDR_CONFIG 36 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x3bd5 mmUVD_UDEC_DBW_ADDR_CONFIG 64 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x03d5 mmUVD_UDEC_DBW_ADDR_CONFIG 152 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_UDEC_DBW_ADDR_CONFIG 0x03d5