mmUVD_SUVD_CGC_GATE_BASE_IDX   67 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_SUVD_CGC_GATE_BASE_IDX                                                                   1
mmUVD_SUVD_CGC_GATE_BASE_IDX  155 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_SUVD_CGC_GATE_BASE_IDX                                                                   1
mmUVD_SUVD_CGC_GATE_BASE_IDX  819 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_SUVD_CGC_GATE_BASE_IDX                                                                   1
mmUVD_SUVD_CGC_GATE_BASE_IDX  494 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_SUVD_CGC_GATE_BASE_IDX                                                                   1