mmUVD_STATUS_BASE_IDX  207 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_STATUS_BASE_IDX                                                                          1
mmUVD_STATUS_BASE_IDX  395 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_STATUS_BASE_IDX                                                                          1
mmUVD_STATUS_BASE_IDX  699 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_STATUS_BASE_IDX                                                                          1
mmUVD_STATUS_BASE_IDX  476 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_STATUS_BASE_IDX                                                                          1