mmUVD_SEMA_CMD     77 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_SEMA_CMD 0x3BC2
mmUVD_SEMA_CMD     29 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_SEMA_CMD                                                          0x3bc2
mmUVD_SEMA_CMD     29 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_SEMA_CMD                                                          0x3bc2
mmUVD_SEMA_CMD     29 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_SEMA_CMD                                                          0x3bc2
mmUVD_SEMA_CMD    136 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_SEMA_CMD                                                                                 0x03c2
mmUVD_SEMA_CMD    808 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_SEMA_CMD                                                                                 0x0582
mmUVD_SEMA_CMD    793 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_SEMA_CMD                                                                                 0x02ea