mmUVD_RB_WPTR3     56 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_RB_WPTR3                                                          0x3d1c
mmUVD_RB_WPTR3    130 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_RB_WPTR3                                                                                 0x051c
mmUVD_RB_WPTR3    290 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_RB_WPTR3                                                                                 0x051c
mmUVD_RB_WPTR3    480 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RB_WPTR3                                                                                 0x01dc
mmUVD_RB_WPTR3    567 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RB_WPTR3                                                                                 0x00b8