mmUVD_RB_BASE_LO_BASE_IDX   95 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_RB_BASE_LO_BASE_IDX                                                                      1
mmUVD_RB_BASE_LO_BASE_IDX  217 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_RB_BASE_LO_BASE_IDX                                                                      1
mmUVD_RB_BASE_LO_BASE_IDX  929 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RB_BASE_LO_BASE_IDX                                                                      1
mmUVD_RB_BASE_LO_BASE_IDX  540 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RB_BASE_LO_BASE_IDX                                                                      1