mmUVD_RB_BASE_LO2_BASE_IDX   85 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_RB_BASE_LO2_BASE_IDX                                                                     1
mmUVD_RB_BASE_LO2_BASE_IDX  207 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_RB_BASE_LO2_BASE_IDX                                                                     1
mmUVD_RB_BASE_LO2_BASE_IDX  919 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RB_BASE_LO2_BASE_IDX                                                                     1
mmUVD_RB_BASE_LO2_BASE_IDX  550 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RB_BASE_LO2_BASE_IDX                                                                     1