mmUVD_RB_BASE_HI2   40 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_RB_BASE_HI2                                                       0x3c22
mmUVD_RB_BASE_HI2   86 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_RB_BASE_HI2                                                                              0x0422
mmUVD_RB_BASE_HI2  208 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_RB_BASE_HI2                                                                              0x0422
mmUVD_RB_BASE_HI2  920 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RB_BASE_HI2                                                                              0x05e2
mmUVD_RB_BASE_HI2  551 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RB_BASE_HI2                                                                              0x00b0