mmUVD_RBC_READ_REQ_URGENT_CNTL_BASE_IDX  687 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RBC_READ_REQ_URGENT_CNTL_BASE_IDX                                                        1
mmUVD_RBC_READ_REQ_URGENT_CNTL_BASE_IDX  784 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RBC_READ_REQ_URGENT_CNTL_BASE_IDX                                                        1