mmUVD_RBC_RB_RPTR 71 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h #define mmUVD_RBC_RB_RPTR 0x3DA4 mmUVD_RBC_RB_RPTR 71 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h #define mmUVD_RBC_RB_RPTR 0x3da4 mmUVD_RBC_RB_RPTR 77 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h #define mmUVD_RBC_RB_RPTR 0x3da4 mmUVD_RBC_RB_RPTR 93 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h #define mmUVD_RBC_RB_RPTR 0x3da4 mmUVD_RBC_RB_RPTR 196 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_RBC_RB_RPTR 0x05a4 mmUVD_RBC_RB_RPTR 384 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_RBC_RB_RPTR 0x05a4 mmUVD_RBC_RB_RPTR 680 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_RBC_RB_RPTR 0x0264 mmUVD_RBC_RB_RPTR 777 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_RBC_RB_RPTR 0x02e0