mmUVD_POWER_STATUS_BASE_IDX   29 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h #define mmUVD_POWER_STATUS_BASE_IDX                                                                    1
mmUVD_POWER_STATUS_BASE_IDX   33 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h #define mmUVD_POWER_STATUS_BASE_IDX                                                                    1
mmUVD_POWER_STATUS_BASE_IDX  385 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h #define mmUVD_POWER_STATUS_BASE_IDX                                                                    1
mmUVD_POWER_STATUS_BASE_IDX  388 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h #define mmUVD_POWER_STATUS_BASE_IDX                                                                    1